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shahram modanlou

I was born in Jouybar, Iran, in 1987. He received a B.Sc. degree in Electrical Engineering from the University of Urmia, Iran, in the Department of Engineering in 2012. He also received the M.Sc. in Micro Electronic field from Babol Noshirvani The University of Technology, Iran, in 2013. his research interests include the analysis and design of delay-locked loops (DLL), phase-locked loops (PLL), analog circuit design, oscillators like voltage-controlled oscillators (VCO), quadrature voltage-controlled oscillators (QVCO), and transceiver systems.
Living in : Iran
Gender : MaleRace : Middle Eastern
Academic Profile
Posts

Contact Information

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https://join.skype.com/invite/ayfYjhP4XGNHSkype ID
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shahrammodanlouApplyChance Link

Educations

Babol Noshirvani University of Technology logo
Electronics EngineeringPhDBabol Noshirvani University of Technology2021-09-19 Iran
Supervisor's name :Dr. Gholamreza Ardeshir
Title :
Analysis and design of Delay Locked Loop with low jitter and spur for frequency multiplier
Babol Noshirvani University of Technology logo
Electronics EngineeringMaster'sBabol Noshirvani University of Technology2014-10-14 Iran
Supervisor's name :Dr. Hossein Miar‐Naimi
Title :
Analysis and design of sub-harmonic mixer with a high linear range and high isolation
Urmia University logo
Electrical EngineeringBachelor'sUrmia University2011-01-31 Iran
Title :
voice recognition

Work Experiences

Teaching Assistant
at babol noshirvani of techn
Start : 19-Feb-2013
End : 24-Jul-2013
Teaching
at babol noshirvani of techn
Start : 26-Mar-2014
End : 23-Nov-2022

English Scores

IELTS06-Jun-2023
6/9Total
Reading :
6.5/9
Speaking :
7/9
Listening :
6/9
Writing :
6/9
TOEFL01-Jan-2024
110/120Total
Reading :
28/30
Listening :
27/30
Speaking :
28/30
Writing :
28/30

Conferences

Your Presentation Title :
Design of voltage controlled ring oscillator with low power and wide frequency range
Conference Name :3rd conference on applied
Iran
2022

Journal Publications

Publication Title :
Analysis and design of a low jitter delay‐locked loop using lock state detectorFirst author
Journal :
International Journal of Circuit Theory and Applications
Link :
Publication Title :
Design and analysis of high linearity mixer using subharmonic techniqueFirst author
Journal :
International Journal of Circuit Theory and Applications
Link :
Publication Title :
A low power and jitter delay cell with pulse width modulation for wide range delay lock loopsFirst author
Journal :
Microelectronics Journal
Link :
Publication Title :
Using tail current phase shift technique to improve locking range injection‐locked frequency dividerSecond author
Journal :
International Journal of Circuit Theory and Applications
Link :
Publication Title :
Amplitude control loop to compensate for I/Q mismatch in an accurate quadrature LC oscillatorSecond author
Journal :
World Scientific Proceedings Series on Computer Engineering and Information Science 1; Computational Intelligence in Decision and Control - Proceedings of the 8th International FLINS Conference
Link :
Publication Title :
A general jitter analysis of DLL considering the jitter accumulation effect of loop capacitorFirst author
Journal :
Microprocessors and Microsystems
Link :

References

Hossein Miar‐Naim
h_miare@nit.ac.ir
Gholamreza Ardeshir
g.ardeshir@nit.ac.ir
Mohammad Gholami
m.gholami@umz.ac.ir