Jacob Arellano

Jacob Arellano is passionate about AI acceleration and hardware-software co-design. With a strong academic background in computer architecture and embedded systems, they have contributed to optimizing AI workloads using FPGAs, GPUs, and ASICs. They are eager to advance sustainable AI computing through interdisciplinary research.

Living in : Japan

Gender : MaleRace : No Response

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Educations

Software EngineeringMaster'sNational University of Singapore2023-08-11 Singapore

Software EngineeringBachelor'sUniversity of Toronto2020-02-21 Canada

Work Experiences

job1

at company1

Start : 11-May-2020

End : 21-Jul-2021

job2

at company2

Start : 21-Jul-2021

End : 14-Jul-2022

job3

at company3

Start : 12-Jul-2023

End : 10-Dec-2024

English Scores

IELTS01-Jan-0001

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Journal Publications

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Proceedings of the 12th International Workshop on Software Configuration Management, SCM 2005

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Proceedings - 1st International Symposium on Empirical Software Engineering and Measurement, ESEM 2007

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IEEE Software

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ISSTA 2016 - Proceedings of the 25th International Symposium on Software Testing and Analysis

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